There are certain manual adjustments that can be made in the BIOS of certain mobos which can serve to adjust these timings and allow a CPU to run at a higher speed than it could otherwise. This is very similiar to loosening the timing on memory. These adjustments go under the name "clock skew," and you can read some more about one form of it here, and see an example of clock skew controls here.

Since Bloomfield CPUs are not socket compatible with previous Intel platforms, the accelerated launch is not expected to cause competition between the company's own products, although the same cannot be said for AMD's scheduled AM3-based CPU launch, noted the sources.

Intel has told its partners that it plans to announce an IGP powered CPU in Q3 2009. This looks quite far away but we can now confirm that this CPU shares the Nehalem architecture and also has an integrated memory controller.

Intel has the financial sense to drop the quad-core all the way to $100 per quad-core CPU, but currently it doesn’t have to, as AMD doesn’t really compete well with Yorkfield 45nm quad-core. If Intel does it, this would mean that it would hurt its very healthy average selling prices, and we don’t see this happening. In case AMD comes out with some fearsome competition, which won’t happen anytime soon, Intel can drop the price and hurt AMD’s financials even more.

Bobcat is supposed to be new from the ground up, and is specifically designed for low-power operating environments. AMD has previously stated that the core would scale from 1-10W, and while the 8W TDP of the chip pictured above puts it within that range, there doesn't appear to be anything architecturally new about it, nor any indication of how AMD would scale it down to a TDP of just 1W while maintaining competitive performance. Bobcat, on the other hand, is supposedly a much simpler (and smaller) x86 processor than we've seen in recent years, with a core design that would allow it to scale into handheld devices. AMD has not specifically stated whether Bobcat is an in-order (Atom) or out-of-order (Nano, K8, K10, etc) part, but media coverage from the chip's unveiling in 2007 and the chip's target goal of scaling as low as 1W both seem to suggest the former.